Light emitting diode element and method for fabricating the same

ABSTRACT

The present invention discloses a light emitting diode (LED) element and a method for fabricating the same, which can promote light extraction efficiency of LED, wherein a substrate is etched to obtain basins with inclined natural crystal planes, and an LED epitaxial structure is selectively formed inside the basin. Thereby, an LED element having several inclines is obtained. Via the inclines, the probability of total internal reflection is reduced, and the light extraction efficiency of LED is promoted.

CROSS REFERENCE TO RELATED APPLICATION

This application is a Divisional of co-pending application Ser. No.11/961,478, filed on Dec. 20, 2007, and for which priority is claimedunder 35 U.S.C. §120, the entire contents of which are herebyincorporated by reference.

FIELD OF THE INVENTION

The present invention relates to a light emitting diode element and amethod for fabricating the same, particularly to a high light-extractionefficiency light emitting diode element and a method for fabricating thesame.

BACKGROUND OF THE INVENTION

Traditionally, a light emitting diode (LED) is fabricated into aparallelepiped shape. An LED usually has a small total reflectioncritical angle because there is a great difference between therefractive indexes of a semiconductor and a packaging material. Thelight generated by LED reaching an interface by an angle greater thanthe total reflection critical angle will be totally reflected back tothe interior of the LED chip. Besides, the parallel faces of aparallelepiped decrease the probability that light leaves asemiconductor from an interface. Thus, photons can only be totallyreflected inside a chip until they are completely absorbed and convertedinto heat. Therefore, LED usually has insufficient light efficiency.

Changing LED shape is an effective approach to improve LED lightefficiency. In a U.S. Pat. No. 6,229,160, HP and LumiLeds Co. discloseda “Truncated Inverted Pyramid (TIP)” LED, wherein four faces of anAlGaInP/GaP LED chip is mechanically fabricated to be no more parallelto each other. Thus, the external quantum efficiency thereof is greatlyincreased to 55%, and the light efficiency thereof can reach as high as1001 m/W. The TIP LED is the first LED achieving the abovementionedstandard. However, the technology of TIP LED can only apply to red lightAlGaInP/GaP LED chips. A gallium nitride (GaN) LED is epitaxially grownon a sapphire substrate, which is very hard to mechanically fabricate.Therefore, the TIP LED technology cannot apply to GaN LED.

A U.S. Pat. No. 6,768,136 disclosed a LED using a SiC or GaN substrate,which can be fabricated more easily than sapphire. Thus, LED chips canbe mechanically fabricated to change their shapes and promote lightefficiency. Thereby, the light efficiencies of InGaN LED and GaN LED canbe doubled. However, the prices of SiC substrates and GaN substrates arevery high. Therefore, this technology is hard to commercialize.

A R.O.C. patent publication No. 565957 disclosed a “Hydride Vapor PhaseEpitaxy (HVPE)”, wherein a thick-film GaN epitaxial layer with inclinednatural planes is formed on a substrate, and LED crystal is then formedon the substrate with a MOCVD (Metal Organic Chemical Vapor Deposition)technology. Thereby, LED has a higher light efficiency. This technologyindeed solves the problems of mechanical fabrication and substrateprice. However, it has the disadvantages of needing two epitaxialprocesses, which make LED fabrication more complicated.

SUMMARY OF THE INVENTION

The present invention provides a LED (Light Emitting Diode) element anda method for fabricating the same, wherein a substrate is etched to formbasins having inclined natural crystal planes, and LED epitaxial layersare selectively grown inside the basins to obtain a multi-incline LEDwithout using any mechanical fabrication process or secondary epitaxialprocess.

The method for fabricating an LED element of the present inventioncomprises (a) providing a substrate, forming a passivation layer on thesubstrate and defining a plurality of polygonal etch areas, wherein thesubstrate may be made of sapphire, silicon carbide (SiC), silicon (Si),gallium arsenide (GaAs) or aluminum nitride (AlN), wherein thepassivation layer has a width of between 5 and 50 microns, and whereinthe etch area has an inner diameter of between 200 and 2000 microns andmay have a shape of a rectangle, circle, triangle, star, or polygon; (b)etching the substrate to form on the etch areas a plurality of basinshaving inclined natural crystal planes and a bottom plane, wherein thebasin has a depth of between 0.5 and 50 microns, wherein the etchingtime may be prolonged until the passivation layer is all removed, andwherein the bottom plane of the basin may be pattern-etched to form arugged surface for increasing light extraction efficiency; (c) formingan LED structure on the bottom plane of the basin via epitaxiallygrowing on the basin an n-type III-V group compound layer, an activelayer and a p-type III-V group compound layer in sequence, wherein theactive layer is interposed between the n-type III-V group compound layerand the p-type III-V group compound layer and functions as a lightemitting zone, and wherein for providing a forward bias, a p-type ohmiccontact electrode is electrically coupled to the p-type III-V groupcompound layer, and an n-type ohmic contact electrode is electricallycoupled to the n-type III-V group compound layer; and (d) grinding thesubstrate, cutting and splitting the ground substrate into LED chips.

The light emitting diode element fabricated according to theabovementioned method comprises: a substrate and a LED structure. Thesubstrate is etched to form basins having inclined natural crystalplanes and a bottom plane. The LED structure is formed on the bottomplane of the basin via epitaxially growing on the bottom plane an n-typeIII-V group compound layer, an active layer and a p-type III-V groupcompound layer in sequence. The active layer is interposed between then-type III-V group compound layer and the p-type III-V group compoundlayer and functions as a light emitting zone. For providing a forwardbias, a p-type ohmic contact electrode is electrically coupled to thep-type III-V group compound layer, and an n-type ohmic contact electrodeis electrically coupled to the n-type III-V group compound layer.

The active layer may be a dual heterogeneous (DH) junction structure, asingle quantum well (SQW) structure or a multiple quantum well (MQW)structure.

Further, the LED structure may be electrically coupled to a heatdissipation/reflection substrate via the p-type ohmic contact electrodeand the n-type ohmic contact electrode. The heat dissipation/reflectionsubstrate includes a reflective metal layer and a heat-conductionsubstrate. One surface of the reflective metal layer is electricallycoupled to the LED structure, and the other surface is connected to theheat-conduction substrate. The material of the reflective metal layer isselected from the group consisting of gold (Au), aluminum (Al), copper(Cu), etc.; alternatively, the material of the reflective metal layermay also be one combination of the abovementioned materials. Thematerial of the heat-conduction substrate is selected from the groupconsisting of gold (Au), aluminum (Al), copper (Cu), silicon (Si),gallium phosphide (GaP), silicon carbide (SiC), etc.; alternatively, thematerial of the heat-conduction substrate may also be one combination ofthe abovementioned materials.

The present invention also provides another method for fabricating a LEDelement, wherein the substrate is removed, which comprises (a) providinga substrate, forming a passivation layer on the substrate and defining aplurality of polygonal etch areas; (b) etching the substrate to form onthe etch areas a plurality of basins having inclined natural crystalplanes and a bottom plane, and pattern-etching the bottom plane to forma rugged surface; (c) forming a LED structure on the bottom plane viaepitaxially growing on the bottom plane an n-type III-V group compoundlayer, an active layer and a p-type III-V group compound layer insequence, wherein the active layer is interposed between the n-typeIII-V group compound layer and the p-type III-V group compound layer andfunctions as a light emitting zone; (d) vapor-depositing a p-type ohmiccontact metal layer on the p-type III-V group compound layer, andconnecting the p-type ohmic contact metal layer with a heat-conductionsubstrate, wherein the material of the heat-conduction substrate isselected from the group consisting of gold (Au), aluminum (Al), copper(Cu), silicon (Si), gallium phosphide (GaP), silicon carbide (SiC),etc.; alternatively, the material of the heat-conduction substrate mayalso be one combination of the above-mentioned materials; (e) removingthe substrate with a wet-etching method, a dry-etching method, a laserlift off method, or a method of using different thermal expansioncoefficients, wherein the substrate will be spontaneously separated fromthe LED structure during temperature variation; (f) vapor-depositing ann-type ohmic contact metal layer on the n-type III-V group compoundlayer; and (g) cutting and splitting the LED structure into LED chips.

The light emitting diode element with the substrate removed fabricatedaccording to the abovementioned method comprises: an LED structurehaving inclines, wherein the LED structure having inclines is formed viaetching a substrate to obtain basins having inclined natural crystalplanes and a bottom plane, and epitaxially growing on the bottom planean n-type III-V group compound layer, an active layer and a p-type III-Vgroup compound layer in sequence, and wherein the active layer isinterposed between the n-type III-V group compound layer and the p-typeIII-V group compound layer and functions as a light emitting zone; ap-type ohmic contact metal layer formed on the p-type III-V groupcompound layer; a heat-conduction substrate connected with the surfaceof the p-type ohmic contact metal layer; and an n-type ohmic contactmetal layer formed on the n-type III-V group compound layer. The n-typeIII-V group compound layer of the abovementioned LED element has arugged surface.

The present invention is superior in being a multi-incline LED, which isformed via etching a substrate to obtain basins having inclined naturalcrystal planes and selectively growing LED epitaxial layers inside thebasins. Via multiple inclines, the probability of total internalreflection is reduced, and the light extraction efficiency of LED ispromoted. Further, the simple fabrication process of the presentinvention is favorable for mass production and can reduce the cost.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1A to FIG. 1E are diagrams schematically showing the process of amethod for fabricating an LED element according to the presentinvention.

FIG. 2A to FIG. 21E are diagrams schematically showing the process of amethod for fabricating an LED element without a passivation layeraccording to the present invention.

FIG. 3A to FIG. 3D are diagrams schematically showing the process of amethod for fabricating an LED element with a rugged surface according tothe present invention.

FIG. 4 is a diagram schematically showing the structure of a flip-chipLED element according to the present invention.

FIG. 5A to FIG. 5E are diagrams schematically showing the process of amethod for fabricating an LED element with the substrate removedaccording to the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The technical contents of the present invention are to be described indetail with embodiments. However, these embodiments are only todemonstrate the present invention but not to limit the scope of thepresent invention.

The present invention utilizes an etching technology to form basins withinclined natural crystal planes on a substrate. Epitaxial layers of LEDare selectively grown in the basins to form an LED with several inclinedplanes. Thereby, a high light-extraction efficiency LED is achieved.

Refer to from FIG. 1A to FIG. 1E diagrams schematically showing theprocess of a method according to the present invention. The method ofthe present invention comprises the following steps:

(a) providing a substrate 100, forming a passivation layer 110 on thesubstrate 100 and defining a plurality of polygonal etch areas 111, asshown in FIG. 1A, wherein the substrate 100 may be made of sapphire,silicon carbide (SiC), silicon (Si), gallium arsenide (GaAs) or aluminumnitride (AlN), and wherein the passivation layer 110 has a width ofbetween 5 and 50 microns, and wherein the etch area 111 has an innerdiameter of between 200 and 2000 microns and may have a shape of arectangle, circle, triangle, star, or polygon;

(b) etching the substrate 100 to form on the etch areas 111 a pluralityof basins 120 with several inclined natural crystal planes and a bottomplane 121, as shown in FIG. 1B, wherein the basin 120 has a depth ofbetween 0.5 and 50 microns; (Recently, the etching technology for asapphire substrate has been extensively studied, and etching sapphire isno more a hard work. In the present invention, a substrate, such as asapphire substrate, is etched to form a basin 120 with inclined naturalcrystal planes. A wet etching solution of sulfuric acid: phosphoricacid=5: 2, which is heated to 270° C., can be used to etch a sapphiresubstrate. When the direction of the passivation layer 110 is parallelto the plane of a sapphire substrate, the substrate can be etch toobtain symmetric composite junctions, and an about 43° angle iscontained by the composite junction and the bottom plane 121. When thedirection of the passivation layer 110 is vertical to the plane of asapphire substrate, the substrate can be etch to obtain an inclinednatural crystal plane and a composite inclined natural crystal plane,wherein an about 32° angle is contained by the inclined natural crystalplane and the bottom plane 121, and an about 60° angle is contained bythe composite plane and the bottom plane 121.)

(c) forming an LED structure 130 on the bottom plane 121 of the basin120, wherein the LED structure 130 comprises: an n-type III-V groupcompound layer 131, an active layer 132 and a p-type III-V groupcompound layer 133, which are sequentially and selectively grown with anMOCVD (Metal Organic Chemical Vapor Deposition) epitaxial method (asshown in FIG. 1C), and wherein the active layer 132 is interposedbetween the n-type III-V group compound layer 131 and the p-type III-Vgroup compound layer 133 and functions as a light emitting zone; (TheLED structure 130 will neither grow on the natural crystal planes formedby etching nor grow on the passivation layer 110 along the perimeter ofthe basin 120 but only selectively grow on the bottom plane 121 of thebasin 120. Then, a dry etching is used to define a p-type ohmic contactelectrode 134 and an n-type ohmic contact electrode 135, wherein thep-type ohmic contact electrode 134 is electrically coupled to the p-typeIII-V group compound layer 133, and the n-type ohmic contact electrode135 is electrically coupled to the n-type III-V group compound layer131, as shown in FIG. 1D. Thereby, a forward bias can be applied.)

(d) grinding the substrate 100, cutting and splitting the groundsubstrate 100 into LED chips, as shown in FIG. 1E.

The light emitting diode element fabricated according to theabovementioned method (shown in FIG. 1E) comprises: a substrate 100 andan LED structure 130. The substrate 100 is etched to form basins 120having inclined natural crystal planes and a bottom plane 121. The LEDstructure 130 is formed via epitaxially growing on the bottom plane 121of the basin 120 an n-type III-V group compound layer 131, an activelayer 132 and a p-type III-V group compound layer 133 in sequence,wherein the active layer 132 is interposed between the n-type III-Vgroup compound layer 131 and the p-type III-V group compound layer 133and functions as a light emitting zone. The active layer 132 may be adual heterogeneous (DH) junction structure, a single quantum well (SQW)structure or a multiple quantum well (MQW) structure. For providing aforward bias, a p-type ohmic contact electrode 134 is electricallycoupled to the p-type III-V group compound layer 133, and an n-typeohmic contact electrode 135 is electrically coupled to the n-type III-Vgroup compound layer 131.

Refer to from FIG. 2A to FIG. 2E diagrams schematically showing theprocess of another method according to the present invention. In thismethod of the present invention, etching can be prolonged until thepassivation layer 110 is all removed. This method is basically similarto the abovementioned method. In Step (b) of this method, the etch areas111 are etched to obtain a plurality of basins 120 having inclinednatural crystal planes and a bottom plane 121, but etching time isprolonged until the passivation layer 110 is all removed, as shown inFIG. 2B. The succeeding Step (c) (shown in FIG. 2C and FIG. 2D) and Step(d) (shown in FIG. 2E) of this method are identical to those of theabovementioned method. However, the diced LED chip shown in FIG. 2E isdifferent from that shown in FIG. 1E in that none passivation layer 110remains in the perimeter of the basin 120 of the substrate 100.

Refer to from FIG. 3A to FIG. 3D diagrams schematically showing theprocess of yet another method according to the present invention. Thismethod of the present invention comprises an additional Step (b-1),which is used to etch the bottom plane 121 of the basin 120 to obtain arugged surface 122 for increasing light extraction efficiency. Thismethod is basically similar to the abovementioned method, but a step isadded to Step (b) to pattern-etch the bottom plane 121 of the basin 120and form a rugged surface 122. The succeeding Step (c) (shown in FIG. 3Band FIG. 3C) and Step (d) (shown in FIG. 3D) of this method areidentical to those of the abovementioned method. However, the diced LEDchip shown in FIG. 3D is different from that shown in FIG. 1E in thatthe bottom plane 121 of the basin 120 is replaced by the rugged surface122. The rugged surface 122 can increase the light extraction efficiencyof LED.

Refer to FIG. 4 a diagram schematically showing the structure of aflip-chip LED element according to the present invention. In thisembodiment, the p-type ohmic contact electrode 134 and the n-type ohmiccontact electrode 135 are respectively connected with twoelectric-conduction poles 210 and 220; thereby, the LED structure 130can be electrically coupled to a heat dissipation/reflection substrate300. The heat dissipation/reflection substrate 300 includes a reflectivemetal layer 310 and a heat-conduction substrate 320. One surface of thereflective metal layer 310 is electrically coupled to the LED structure130 via the electric-conduction poles 210 and 220, and the other surfaceis connected to the heat-conduction substrate 320; thereby, a flip-chipLED element is obtained. The material of the reflective metal layer 310is selected from the group consisting of gold (Au), aluminum (Al),copper (Cu), etc.; alternatively, the material of the reflective metallayer 310 may also be one combination of the abovementioned materials.The material of the heat-conduction substrate 320 is selected from thegroup consisting of gold (Au), aluminum (Al), copper (Cu), silicon (Si),gallium phosphide (GaP), silicon carbide (SiC), etc.; alternatively, thematerial of the heat-conduction substrate 320 may also be onecombination of the abovementioned materials.

Refer to from FIG. 5A to FIG. 5E diagrams schematically showing theprocess of further another method according to the present invention,wherein the substrate is removed. This method of the present inventioncomprises:

(a) providing a substrate 400, forming a passivation layer 410 on thesubstrate 400 and defining a plurality of polygonal etch areas, whereinthe substrate 400 may be made of sapphire, silicon carbide (SiC),silicon (Si), gallium arsenide (GaAs) or aluminum nitride (AlN), andwherein the passivation layer 410 has a width of between 5 and 50microns, and wherein the etch area has an inner diameter of between 200and 2000 microns and may have a shape of a rectangle, circle, triangle,star, or polygon;

(b) etching the substrate 400 to form on the etch areas a plurality ofbasins 420 with inclined natural crystal planes, and pattern-etching thebottom plane of the basin 420 to obtain a rugged surface 421, as shownin FIG. 5A, wherein the basin 420 has a depth of between 0.5 and 50microns;

(c) forming an LED structure 430 on the bottom plane of the basin 420via epitaxially growing an n-type III-V group compound layer 431, anactive layer 432 and a p-type III-V group compound layer 433 insequence, and wherein the active layer 432 is interposed between then-type III-V group compound layer 431 and the p-type III-V groupcompound layer 433 and functions as a light emitting zone, as shown inFIG. 5B;

(d) vapor-depositing a p-type ohmic contact metal layer 440 on thep-type III-V group compound layer 433 of the LED structure 430, andconnecting the p-type ohmic contact metal layer 440 with aheat-conduction substrate 450, wherein the material of theheat-conduction substrate 450 is selected from the group consisting ofgold (Au), aluminum (Al), copper (Cu), silicon (Si), gallium phosphide(GaP), silicon carbide (SiC), etc.; alternatively, the material of theheat-conduction substrate 450 may also be one combination of theabovementioned materials;

(e) removing the substrate 400 with a wet-etching method, a dry-etchingmethod, a laser lift off method, or a method of using different thermalexpansion coefficients, wherein the substrate 400 will be spontaneouslyseparated from the LED structure during temperature variation;

(f) vapor-depositing an n-type ohmic contact metal layer 460 on then-type III-V group compound layer 431 of the LED structure 430, as shownin FIG. 5D, wherein the junction surface is also a rugged surface 434because of the rugged surface 421 of the removed substrate 400;

(g) cutting and splitting the LED structure into LED chips, as shown inFIG. 5E.

The LED shown in FIG. 5E, which is fabricated according to theabovementioned method and free of the substrate 400, comprises: a LEDstructure 430 with inclines formed via etching a substrate 400 to obtainbasins 420 having inclined natural crystal planes and a rugged bottomsurface 421, and epitaxially growing on the rugged surface 421 an n-typeIII-V group compound layer 431, an active layer 432 and a p-type III-Vgroup compound layer 433 in sequence, wherein the active layer 432 isinterposed between the n-type III-V group compound layer 431 and thep-type III-V group compound layer 433 and functions as a light emittingzone; a p-type ohmic contact metal layer 440 formed on the p-type III-Vgroup compound layer 433; a heat-conduction substrate 450 connected withthe p-type ohmic metal layer 440; and an n-type ohmic contact metallayer 460 formed on the n-type III-V group compound layer 431, whereinthe junction surface is also a rugged surface 434 because of the ruggedsurface 421 of the removed substrate 400. The active layer 432 may be adual heterogeneous (DH) junction structure, a single quantum well (SQW)structure or a multiple quantum well (MQW) structure.

Those described above are only the preferred embodiments to exemplifythe present invention but not to limit the scope of the presentinvention. Any equivalent modification or variation according to thespirit of the present invention is to be also included within the scopeof the present invention.

1. A light emitting diode element comprising: a light emitting diodestructure with inclines formed via etching a substrate to obtain basinshaving inclined natural crystal planes and a bottom plane, andepitaxially growing on said bottom plane an n-type III-V group compoundlayer, an active layer and a p-type III-V group compound layer insequence, wherein said active layer is interposed between said n-typeIII-V group compound layer and said p-type III-V group compound layerand functions as a light emitting zone; a p-type ohmic contact metallayer formed on said p-type III-V group compound layer; aheat-conduction substrate connected with said p-type ohmic contact metallayer; and an n-type ohmic contact metal layer formed on said n-typeIII-V group compound layer.
 2. The light emitting diode elementaccording to claim 1, wherein said light emitting diode structure has ashape of a rectangle, circle, triangle, star, or polygon.
 3. The lightemitting diode element according to claim 1, wherein said light emittingdiode structure has a thickness of between 0.5 and 50 microns and has adiameter of between 200 and 2000 microns.
 4. The light emitting diodeelement according to claim 1, wherein said n-type III-V group compoundlayer has a rugged surface.
 5. The light emitting diode elementaccording to claim 1, wherein said active layer is a dual heterogeneous(DH) junction structure, a single quantum well (SQW) structure or amultiple quantum well (MQW) structure.